EPM570T144I5N vs EPM570GT144C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570T144I5N sa pamamagitan ng Intel at EPM570GT144C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570T144I5N | EPM570GT144C5 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | MAX II | MAX II G |
| Logic Elements | 570 LE | — |
| Macrocells | 440 | 440 |
| Maximum Pin-to-Pin Delay (tPD1) | 8.7 ns | — |
| Maximum Frequency (fCNT) | 304 MHz | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Temperature na Operasyon | -40C to +100C (industrial) | 0C to +85C (commercial) |
| Speed Grade | I5N | — |
| Process Technology | 0.18 um CMOS, 6-layer-metal flash | — |
| Packhaging | TQFP-144 (22 mm x 22 mm, 0.5 mm pitch) | 144-TQFP (20x20 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Boundary-Scan Test | IEEE 1149.1 compliant | — |
| Tindminan RoHS | Compliant | Compliant |
| Series | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 570 |
| User I/O Pins | — | 80 |
| User Flash Memory | — | 8.0 Kbits |
| Pin-to-Pin Delay (tPD) | — | 5.4 ns |
| Programmable Type | — | In-System Programmable (Flash) |
| Core Voltage VCCINT | — | 1.71 V to 1.89 V (internal regulator) |
| I/O Bank Voltage VCCIO | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| LVDS Support | — | Yes (MAX II G feature, up to 300 Mbps) |
| Lead-Free | — | Yes |