EPM570ZM256C7N vs EPM570M256C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570ZM256C7N sa pamamagitan ng Altera at EPM570M256C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570ZM256C7N | EPM570M256C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX II Z | EPM570 |
| Family | MAX II | MAX II |
| Logic Elements (LE) | 570 | — |
| Macro Cells | 440 | 440 |
| User I/Os | 76 | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Maximum Operating Frequency | 123.5 MHz | 201.1 MHz |
| Pin-to-Pin Delay (tPD) | 5.0 ns | 5.4 ns |
| Core Supply Voltage | 1.71 V to 1.89 V (3.3 V with on-chip regulator) | — |
| I/O Supply Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS | 0.18 µm CMOS, non-volatile Flash |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0°C to +85°C (commercial) |
| Packhaging | 256-ball MBGA (Micro FBGA), 0.5 mm pitch, 6 × 6 mm | 256-MBGA (Micro FineLine BGA), 1.0 mm pitch |
| Configuration Method | On-chip non-volatile (instant-on, ISP via JTAG) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | — |
| Lead-Free / RoHS | Lead-free / RoHS compliant | — |
| Logic Family | CMOS | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 440 |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O Banks | — | 2.5 V / 3.3 V |
| User I/O Pins | — | 212 (max, package-limited) |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration Interface | — | JTAG (IEEE 1149.1) / in-system programmable |
| Tindminan RoHS | — | Compliant |
| Lead-Free | — | Yes |