EPM7128AEFC100-5 vs EPM7128SQC100-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128AEFC100-5 sa pamamagitan ng Altera at EPM7128SQC100-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128AEFC100-5 - MAX 7000A CPLD, 128MC, 5ns, 100-FBGA | Altera
EPM7128AEFC100-5 ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | EPM7128AEFC100-5 | EPM7128SQC100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000A | MAX 7000S |
| Logic Family / Base Number | EPM7128A | — |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Frequency (fMAX) | 192.3 MHz | — |
| User I/Os | 84 | — |
| Logic Family | CMOS | — |
| Volte ng Pagbibigay | 3.3 V | 5 V |
| Packhaging | 100-ball FBGA (FineLine BGA) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Bilang ng Pin | 100 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmable Type | EEPROM (In-System Programmable) | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| JTAG Support | Yes (IEEE 1149.1 Boundary Scan) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| Logic Elements / Gates | — | 2,500 usable gates |
| Maximum User I/O | — | 84 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum Operating Frequency | — | 100 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Process Technology | — | 5V CMOS, EEPROM-based |
| Programmability | — | In-System Programmable (ISP) via JTAG |