EPM7128AETC144-7N vs EPM7128AETC144-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128AETC144-7N sa pamamagitan ng Altera at EPM7128AETC144-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128AETC144-7N - MAX 7000A CPLD, 128 Macros, 144-TQFP | Intel / Altera
EPM7128AETC144-7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM7128AETC144-7N | EPM7128AETC144-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Gates | 2500 (2.5K gates) | — |
| Macro Cells | 128 | — |
| User I/Os | 36 (in 144-pin TQFP) | — |
| Maximum Operating Frequency | 129.9 MHz | — |
| Pin-to-Pin Delay | 7.5 ns | — |
| Propagation Delay (tpd) | 7.5 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Process Technology | CMOS, EEPROM-based | — |
| Programmability | In-System Programmable (ISP) via JTAG | — |
| Boundary-Scan Test | IEEE Std 1149.1 (JTAG) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Packhaging | 144-pin TQFP | 144-pin TQFP (also referred to as LQFP-144) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Pin-Compatible With | MAX 7000S 5.0V family (144-pin TQFP) | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: rohs status from manufacturer] |
| Lead-Free | Yes | — |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum User I/Os | — | 36 |
| Pin-to-pin Logic Delay (tPD) | — | 10 ns |
| Maximum Internal Counter Frequency | — | 98 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Voltage Tolerance | — | 2.5 V / 3.3 V / 5 V |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) and ByteBlaster |
| Non-volatile Memory | — | EEPROM, instant-on |
| Global Clocks / Global OE | — | 2 / 2 |
| Level ng MSL | — | MSL 3 (per JEDEC J-STD-020) |