EPM7128AETI100-7 vs EPM7128ATC100-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128AETI100-7 sa pamamagitan ng Altera at EPM7128ATC100-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128AETI100-7 - MAX 7000A CPLD, 128 Macrocells, 100-TQFP | Altera
EPM7128AETI100-7 ObsoleteAltera
EPM7128ATC100-10 - MAX 7000A CPLD, 128 Macrocells, 10ns TQFP-100 | Altera
EPM7128ATC100-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7128AETI100-7 | EPM7128ATC100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2.5K |
| User I/Os | 84 | — |
| Logic Blocks (LABs) | 8 | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum Counter Frequency | 129.9 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| I/O Bank Supply (VCCIO) | 2.5 V / 3.3 V / 5 V (MultiVolt) | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Global Clock Inputs | 4 dedicated | — |
| Packhaging | 100-pin TQFP (1.0 mm pitch, 14 x 14 mm) | 100-pin TQFP (TC100) |
| Temperature na Operasyon | -40 C to +85 C (Industrial) | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: confirm RoHS for non-N suffix] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free Version (MPN Suffix) | -N suffix denotes lead-free (e.g., EPM7128AETI100-7N) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX) |
| Logic Array Blocks (LABs) | — | 4 |
| User I/O Pins | — | 68 |
| Pin-to-Pin Logic Delay | — | 4.5 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Speed Grade | — | -10 (10 ns) |
| Core Supply Voltage | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Program Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |