EPM7128ELC84-10 vs EPM7128SLC8410 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128ELC84-10 sa pamamagitan ng Intel at EPM7128SLC8410 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128ELC84-10 | EPM7128SLC8410 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Equivalent Logic Gates | [DATA_NEEDED: equivalent gate count from datasheet] | — |
| User I/Os | 68 | — |
| Dedicated Inputs | 12 | — |
| Operating Voltage (VCCINT/VCClO) | 5 V | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | [DATA_NEEDED: fCNT from datasheet] | — |
| Packhaging | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Uri ng Pagpapasok | Surface Mount / Socket | Surface Mount (PLCC socket or direct solder) |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Technology | EEPROM-based CMOS | — |
| Programming Interface | IEEE 1149.1 (JTAG) ISP | — |
| In-System Programmable | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status from datasheet] | [DATA_NEEDED: RoHS status - not stated in verified data] |
| Lead-Free | [DATA_NEEDED: lead-free status from datasheet] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Gates | — | 2500 usable gates |
| User I/O Pins | — | 68 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 10 ns |
| Setup Time (tSU) | — | 7 ns |
| Maximum Operating Frequency | — | 125 MHz (counter) |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5 V nominal) |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |