EPM7128EQC100-10 vs EPM7128SQC100-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128EQC100-10 sa pamamagitan ng Altera at EPM7128SQC100-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128EQC100-10 | EPM7128SQC100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000S |
| Logic Family | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 4 | 16 |
| User I/O Pins | 84 | — |
| Propagation Delay (tpd) | 10 ns | — |
| Internal Performance | 100 MHz | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Technology | 5.0 V CMOS, EEPROM-based | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| Packhaging | 100-pin PQFP (Plastic Quad Flat Pack), gull-wing leads | 100-pin PQFP (Plastic Quad Flat Pack) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to +90 °C (Commercial) | 0C to +70C (commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs_status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| Logic Elements / Gates | — | 2,500 usable gates |
| Maximum User I/O | — | 84 |
| Maximum Operating Frequency | — | 100 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Volte ng Pagbibigay | — | 5 V |
| Process Technology | — | 5V CMOS, EEPROM-based |
| Programmability | — | In-System Programmable (ISP) via JTAG |