EPM7128SLI84-10 vs EPM7128SLC84-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128SLI84-10 sa pamamagitan ng Altera at EPM7128SLC84-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128SLI84-10 | EPM7128SLC84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Usable Gates | 2.5K | — |
| Macro Cells | 128 | — |
| User I/Os | 68 | 68 |
| Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Frequency | 100 MHz | 250 MHz |
| Supply Voltage (VCCINT) | 5.0 V | 5 V |
| Configuration Memory | EEPROM (in-system programmable) | — |
| Temperature na Operasyon | -40 °C to +85 °C (industrial) | 0C to +70C (Commercial) |
| Packhaging | 84-pin PLCC | PLCC-84 (J-lead) |
| Uri ng Pagpapasok | Surface Mount / Socket | Surface Mount (J-bend) |
| Process Technology | CMOS | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Tindminan RoHS | [DATA_NEEDED: lead-free variant is -10N suffix] | Non-compliant (contains lead in PLCC) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Gates | — | 2500 |
| Total Package Pins | — | 84 |
| Propagation Delay (tpd) | — | 10 ns |
| Maximum Operating Frequency | — | 125 MHz |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |