EPM7128STC100-10 vs EPM7128STC100-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128STC100-10 sa pamamagitan ng Altera at EPM7128STC100-7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7128STC100-10 | EPM7128STC100-7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | 2,500 |
| User I/Os | 84 | 84 |
| Logic Array Blocks | 8 (16 macrocells per LAB) | — |
| Propagation Delay (tPD) | 10 ns | 7.5 ns |
| Internal Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family | CMOS | CMOS |
| Supply Voltage (VCCINT) | 5 V | 5 V |
| MultiVolt I/O Voltage | 3.3 V / 5 V | — |
| Packhaging | TQFP-100 (C100) | 100-Pin TQFP (TQFP-100) |
| Bilang ng Pin | 100 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmability | In-System Programmable (JTAG, IEEE 1149.1), EEPROM | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status not in provided data] | [DATA_NEEDED: rohs status] |
| Series | — | MAX 7000S |
| Logic Array Blocks (LABs) | — | 8 |
| Internal Frequency | — | 125 MHz |
| Programmable Pin Count | — | 100 |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Configuration Memory | — | EEPROM (non-volatile) |