EPM7128STI100-10N vs EPM7128SQI100-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128STI100-10N sa pamamagitan ng Altera at EPM7128SQI100-15N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N Obsolete
Pagsanggunian na paghahambing
| Parametro | EPM7128STI100-10N | EPM7128SQI100-15N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 7000S | MAX 7000S |
| Architecture | CMOS EEPROM-based CPLD | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 (up to 5,000 family max) | 2,500 (typical) |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/O | 84 | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 175.4 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | Yes (IEEE 1149.1 JTAG) |
| JTAG Boundary-Scan | Yes (BST) | — |
| Packhaging | 100-pin TQFP | PQFP-100 (R-PQFP-G100) |
| Temperature na Operasyon | -40C to +85C (Industrial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Lead-free (N suffix) |
| Open-Drain I/O Option | Available (per MAX 7000A feature set) | — |
| Device Type | — | EE-PLD / CPLD |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Frequency (fCNT) | — | 76.9 MHz |
| Core Supply Voltage (VCCINT) | — | 4.5 V to 5.5 V |
| I/O Logic Levels | — | 3.3 V or 5 V (multi-volt I/O) |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Terminal Form | — | Gull Wing |
| Package Code | — | QFP |
| Process Technology | — | CMOS |
| Non-volatile Configuration | — | EEPROM (instant-on) |