EPM7160SLC84-15 vs EPM7160ELC84-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7160SLC84-15 sa pamamagitan ng Altera at EPM7160ELC84-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7160SLC84-15 | EPM7160ELC84-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 160 | 160 |
| Usable Gates | 3,200 | 3,200 |
| Maximum Propagation Delay | 15 ns | — |
| Maximum User I/O Pins | 64 | — |
| Supply Voltage (VCCINT/VCIO) | 4.75 V to 5.25 V (5 V nominal) | — |
| I/O Logic Level | Configurable 3.3 V or 5 V | — |
| Technology | CMOS, EEPROM configuration | — |
| Package Type | PLCC-84 (PQCC84, JEDEC S-PQCC-J84) | 84-pin PLCC (J-Lead) |
| Terminal Pitch | 1.270 mm | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket or direct solder) | Surface Mount (PLCC socket compatible) |
| Temperature na Operasyon | 0 C to 70 C | 0 C to +70 C (commercial) |
| Programming Interface | JTAG (IEEE 1149.1) in-system programmable | — |
| Tindminan RoHS | Not RoHS compliant (contains lead, SnPb finish typical) | Contains lead / RoHS non-compliant (per Altera listing) |
| Lifecycle | Obsolete / last-time-buy (per Altera/Intel PDN) | — |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Architecture | — | EEPROM-based, second-generation MAX |
| Logic Array Blocks | — | 4 |
| Maximum I/O Pins | — | 36 |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Frequency | — | 76.9 MHz |
| Supply Voltage (Vcc) | — | 5 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |