EPM7160SQC160-10N vs EPM7160SQC160-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7160SQC160-10N sa pamamagitan ng Intel at EPM7160SQC160-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7160SQC160-10N | EPM7160SQC160-10 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Macro Cells | 160 | 160 |
| Usable Gates | 3,200 | — |
| Logic Elements / Blocks | 10 Logic Array Blocks (LABs) | — |
| User I/O Pins | 104 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 167 MHz | — |
| Counter Speed (fCNT) | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| Temperature na Operasyon | 0 C to 70 C (Commercial) | 0 C to +70 C (commercial) |
| Packhaging | PQFP-160 (SQC) 31.2 x 31.2 mm | PQFP-160 (SQC160) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Non-Compliant (Pb-bearing PQFP) | unknown |
| Memory Technology | EEPROM | — |
| Logic Elements / Gates | — | 3,200 usable gates |
| User I/Os | — | 104 |
| Logic Array Blocks (LABs) | — | 10 |
| Maximum Operating Frequency | — | 100 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| I/O Voltage Tolerance | — | 5.0 V |
| Programming Technology | — | EEPROM, in-system programmable |
| JTAG Support | — | IEEE 1149.1 (boundary-scan + ISP) |
| Logic Family | — | CMOS |
| Process Technology | — | CMOS, EEPROM-based |
| Lead-Free | — | unknown |