EPM7192SQC160-10 vs EPM7160SQC160-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7192SQC160-10 sa pamamagitan ng Altera at EPM7160SQC160-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7192SQC160-10 - 192-Macro MAX 7000S CPLD, 100MHz, PQFP-160 | Intel / Altera
EPM7192SQC160-10 NrndAltera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7192SQC160-10 | EPM7160SQC160-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 4 | 10 |
| User I/Os | 124 | 104 |
| Usable Gates | 3750 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| Packhaging | PQFP-160 (SQC) 28x28 mm | PQFP-160 (SQC160) |
| Pin/Package Type | Surface Mount, Gull-Wing | — |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Macro Cells | — | 160 |
| Logic Elements / Gates | — | 3,200 usable gates |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| I/O Voltage Tolerance | — | 5.0 V |
| Programming Technology | — | EEPROM, in-system programmable |
| JTAG Support | — | IEEE 1149.1 (boundary-scan + ISP) |
| Temperature na Operasyon | — | 0 C to +70 C (commercial) |
| Logic Family | — | CMOS |
| Uri ng Pagpapasok | — | Surface Mount |
| Process Technology | — | CMOS, EEPROM-based |
| Lead-Free | — | unknown |