EPM9320ALC84-10 vs EPM9320LC84-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ALC84-10 sa pamamagitan ng Intel at EPM9320LC84-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320ALC84-10 | EPM9320LC84-20 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device | EPM9320 | — |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 52 | — |
| Dedicated Inputs | 16 | 4 (global clock / clear / OE) |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| In-System Programmability | 5.0 V ISP via IEEE 1149.1 JTAG | Yes (IEEE 1149.1 JTAG) |
| Technology | CMOS EEPROM-based, third-generation MAX | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (speed grade -10) | PCI Local Bus Specification Rev. 2.2 |
| Packhaging | 84-pin PLCC (J-Lead) | PLCC-84 (Plastic Leaded Chip Carrier) |
| Temperature na Operasyon | [DATA_NEEDED: commercial/industrial grade] | 0 C to 70 C |
| Uri ng Pagpapasok | Surface Mount / Through-Hole (PLCC socket) | — |
| Tindminan RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Non-Volatile Configuration | Yes (EEPROM cell, powers up in known state) | — |
| Architecture | MAX (Multiple Array MatriX) with FastTrack Interconnect | Multiple Array MatriX (MAX), 3rd generation |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| User I/Os | — | 60 |
| Logic Family | — | CMOS (EEPROM-based) |
| Pins | — | 84 |
| Propagation Delay (tPD) | — | 16 ns |
| Internal Counter Frequency | — | 118 MHz |
| Volte ng Pagbibigay | — | 5.0 V |