EPM9320ALC84-15 vs EPM9320BC356-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ALC84-15 sa pamamagitan ng Altera at EPM9320BC356-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320ALC84-15 | EPM9320BC356-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 CPLD | MAX 9000 |
| Macrocells | 320 | 320 |
| Usable Gates | 6000 | — |
| Propagation Delay (tPD) | 16 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V (5.0 V typical) |
| User I/O | 56 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Technology | CMOS, EEPROM-based configuration | — |
| Packhaging | 84-pin PLCC (S-PQCC-J84, J-lead) | 356-ball LBGA (BGA-356, 35x35 mm) |
| Uri ng Pagpapasok | Through-hole / socket | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Temperature na Operasyon | -40C to +85C (industrial) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | MSL-3 (168 hours per fpgalink.com) | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead free status] | — |
| RoHS3 Compliance | ROHS3 Compliant (per fpgalink.com listing) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Pin-to-Pin Delay (max) | — | 15 ns |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (5.0-V ISP via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| Programmable Type | — | In System Programmable |
| Operating Temperature Grade | — | Commercial |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |