EPM9320ARC208-10N vs EPM9320ARI208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ARC208-10N sa pamamagitan ng Altera at EPM9320ARI208-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoletePagsanggunian na paghahambing
| Parametro | EPM9320ARC208-10N | EPM9320ARI208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 320 | — |
| Logic Gates | 6,000 gates | — |
| Logic Array Blocks (LABs) | 16 | 20 |
| Propagation Delay (tPD) | 10 ns | 10 ns (speed grade -10) |
| Maximum Frequency | 144.9 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 168 | — |
| Dedicated Input Pins | 12 | — |
| Packhaging | 208-pin RQFP (BFQFP with exposed pad) | 208-pin RQFP (S-PQFP-G208) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (Commercial) | -40 C to +85 C (industrial) |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Tindminan RoHS | Compliant (lead-free 'N' suffix) | unknown |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 |
| Macrocells | — | 320 |
| Maximum Operating Frequency | — | 144.9 MHz |
| Volte ng Pagbibigay | — | 4.5 V to 5.5 V |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |