EPM9320RC208-20 vs EPM9320RI208-20C Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RC208-20 sa pamamagitan ng Altera at EPM9320RI208-20C sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9320RC208-20 EPM9320RI208-20C
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) EE PLD / CPLD
Macrocells 320 —
Logic Array Blocks (LABs) 20 16
Usable Gates 6,000 6,000
Maximum I/O Pins 132 —
Propagation Delay (tPD max) 20 ns —
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
Programming Technology EEPROM, in-system programmable (ISP) —
Boundary-Scan Interface IEEE Std. 1149.1 (JTAG) —
Temperature na Operasyon 0 °C to 70 °C (commercial) —
Packhaging 208-RQFP, exposed pad (208-BFQFP) 208-pin RQFP (Plastic Quad Flat Pack)
Uri ng Pagpapasok Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 3rd generation —
Process Technology CMOS, 5.0 V EEPROM —
Reprogrammability Yes, unlimited ISP cycles —
Logic Elements / Macrocells — 320
Number of Flip-Flops — 484
Maximum Internal Clock Frequency — 100 MHz
Pin-to-Pin Propagation Delay (tPD) — 20 ns
Supply Voltage (VCCINT/VCCIO) — 5.0 V
I/O Voltage Tolerance — 3.3 V or 5.0 V
Programmable Interface — JTAG (IEEE Std. 1149.1) BST
In-System Programmability — Yes (5.0 V ISP via JTAG)
Technology — CMOS EEPROM
Operating Temperature (Industrial) — -40C to +85C
Lead-Free / RoHS — Information not confirmed from verified data [DATA_NEEDED: RoHS status]

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