EPM9320RI208-20N vs EPM9320RC208-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RI208-20N sa pamamagitan ng Altera at EPM9320RC208-15N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320RI208-20N | EPM9320RC208-15N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Device Family | MAX 9000 (EPM9320) | — |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Macrocells | 320 | — |
| Flip-Flops | 484 | 484 |
| Propagation Delay (tPD) | 20 ns | 15 ns |
| Supply Voltage (VCC) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V or 5 V configurable | — |
| Packhaging | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin RQFP (PowerQuad Flat Pack) |
| Package Lead Pitch | 0.500 mm | — |
| Number of Terminals | 208 | — |
| Hanay ng Temperature na Operasyon | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| In-System Programmability | Yes, 5.0 V ISP via JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| Dedicated Input Pins | 4 (low-skew global distribution) | — |
| Minimum DC Input on I/O Pins | -0.5 V | — |
| Minimum DC Input on Dedicated Inputs | -0.3 V | — |
| Input Undershoot/ Overshoot | -2.0 V / 7.0 V for <20 ns (no-load) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 |
| Macro Cells | — | 320 |
| Configurable I/O Lines | — | 128 |
| Maksimum na Taktiko ng Oras | — | 117.6 MHz |
| Volte ng Pagbibigay | — | 5.0 V |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| Configuration Technology | — | CMOS EEPROM (non-volatile) |
| Terminal Pitch | — | 0.5 mm |
| Packaging | — | Tray |