EPM9400RC240-20 vs EPM9480RC240-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9400RC240-20 sa pamamagitan ng Altera at EPM9480RC240-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9400RC240-20 EPM9480RC240-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Device Family MAX 9000 MAX 9000
Macrocells 400 —
Pin-to-Pin Delay (tPD) 20 ns 15 ns
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
Logic Elements / LABs [DATA_NEEDED: number of LABs] —
Programmable Type In System Programmable (EEPROM) In System Programmable (ISP)
Programming Interface IEEE Std. 1149.1 JTAG —
Packhaging 240-RQFP (32x32 mm) with exposed pad 240-pin RQFP (32x32 mm)
Supplier Device Package 240-RQFP 240-RQFP (32x32)
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon [DATA_NEEDED: commercial/industrial temp grade] [DATA_NEEDED: operating temperature range]
Technology CMOS, EEPROM-based —
I/O Count [DATA_NEEDED: usable I/O count for 240-RQFP] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance per data] RoHS non-compliant
Architecture MAX (Multiple Array MatriX) - third generation —
Series MAX 9000 —
Macro Cells — 480
Usable Gates — 12,000
Internal Supply Voltage — 4.75 V to 5.25 V
Configuration Technology — EEPROM-based (non-volatile)
JTAG Interface — IEEE Std. 1149.1
Number of I/O Pins — [DATA_NEEDED: user I/O count]
Lead Free Status — [DATA_NEEDED: lead free status]
Logic Architecture — Multiple Array MatriX (MAX) third-generation
Supply Voltage (5.0 V nominal) — 5.0 V

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita