EPM9480RC208-20 vs EPM9480RC208-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9480RC208-20 sa pamamagitan ng Intel at EPM9480RC208-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9480RC208-20 | EPM9480RC208-15 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 10,000 gates |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Pin-to-Pin Delay | 20 ns | — |
| Maximum Operating Frequency | 117.6 MHz | 117.6 MHz |
| Volte ng Pagbibigay | 5 V | 5.0 V |
| Technology | CMOS EEPROM (non-volatile) | — |
| Packhaging | 208-pin RQFP (Plastic Quad Flat Pack) | RQFP-208 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | -40C to +85C (commercial) |
| I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Logic Cells / Macro Cells | — | 480 macro cells |
| Propagation Delay (tPD) | — | 15 ns |
| User I/O Pins | — | 153 |
| Programmability | — | In-System (ISP) via JTAG IEEE 1149.1 |
| Configuration Memory | — | EEPROM (non-volatile) |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |