EPM9560ARC208-10N vs EPM9480RC208-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC208-10N sa pamamagitan ng Altera at EPM9480RC208-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARC208-10N | EPM9480RC208-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 10,000 gates |
| User I/O Pins | 153 | 153 |
| Pin-to-Pin Delay | 10 ns | — |
| Internal Counter Frequency | 144.9 MHz | — |
| Volte ng Pagbibigay | 5 V | 5.0 V |
| Technology | CMOS EEPROM | — |
| Packhaging | 208-pin RQFP (PowerQuad II) | RQFP-208 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 C to +70 C (commercial) | -40C to +85C (commercial) |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes (JTAG ISP) | — |
| Logic Array Blocks (LABs) | 20 | — |
| Speed Grade | -10 | — |
| Tindminan RoHS | Compliant (N suffix) | [DATA_NEEDED: RoHS compliance status] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Logic Cells / Macro Cells | — | 480 macro cells |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tPD) | — | 15 ns |
| Programmability | — | In-System (ISP) via JTAG IEEE 1149.1 |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |