EPM9560ARC240-10 vs EPM9560ARC208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC240-10 sa pamamagitan ng Altera at EPM9560ARC208-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARC240-10 | EPM9560ARC208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| User I/Os (this package) | 191 (per Mouser listing) | — |
| Internal Frequency | 144.9 MHz | — |
| Propagation Delay (tpd) | 11.4 ns | — |
| Supply Voltage - Internal (VCCINT) | 5.0 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (selectable) | — |
| Process Technology | CMOS EEPROM | — |
| Packhaging | 240-pin PowerQuad QFP (RQFP / EAR240) | 208-pin RQFP (PowerQuad II) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | EEPROM (non-volatile) |
| Logic Family | CMOS | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay | — | 10 ns |
| Internal Counter Frequency | — | 144.9 MHz |
| Volte ng Pagbibigay | — | 5 V |
| Technology | — | CMOS EEPROM |
| Uri ng Pagpapasok | — | Surface Mount |
| In-System Programmability | — | Yes (JTAG ISP) |
| Logic Array Blocks (LABs) | — | 20 |
| Speed Grade | — | -10 |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |