EPM9560RC-10 vs EPM9560ARI240-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC-10 sa pamamagitan ng Intel at EPM9560ARI240-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC-10 | EPM9560ARI240-10 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| In-System Programmability | IEEE 1149.1 JTAG | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array Matrix (MAX) - third generation | — |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Packhaging | 240-pin PGA (RC suffix) | 240-pin RQFP (PowerQuad Flat Pack) |
| Uri ng Pagpapasok | Through-Hole / Socketed | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 560 |
| User I/O Pins | — | 191 |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Internal Frequency | — | 144.9 MHz |
| Volte ng Pagbibigay | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based configuration |
| Hanay ng Temperature na Operasyon | — | -40 C to +85 C (industrial) |
| Configuration Memory | — | EEPROM (non-volatile, instant-on) |
| Logic Architecture | — | Multiple Array MatriX (MAX) with global interconnect array |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |
| Number of Terminals | — | 240 |
| Terminal Form | — | Gull Wing |