EPM9560RC-10 vs EPM9560RC208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC-10 sa pamamagitan ng Intel at EPM9560RC208-10N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel
EPM9560RC208-10N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM9560RC-10 | EPM9560RC208-10N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| In-System Programmability | IEEE 1149.1 JTAG | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Architecture | Multiple Array Matrix (MAX) - third generation | — |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Packhaging | 240-pin PGA (RC suffix) | 208-pin RQFP (Power Quad Flat Pack) |
| Uri ng Pagpapasok | Through-Hole / Socketed | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Device | — | EPM9560 |
| Macro Cells | — | 560 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay (tPD1) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Bank Voltage (VCCIO) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 JTAG |