EPM9560RC208-10 vs EPM9560RC208-10N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-10 sa pamamagitan ng Intel at EPM9560RC208-10N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
EPM9560RC208-10N EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel

EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel

EPM9560RC208-10N ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPM9560RC208-10 EPM9560RC208-10N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Huling Pagbili
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 —
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins 212 (208-pin package variant) —
Usable Gates 12,000 12,000
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Frequency (fMAX) [DATA_NEEDED: internal toggle frequency in MHz] —
Supply Voltage (VCCINT) 5.0 V 5.0 V
I/O Standards Supported 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) —
Configuration Memory EEPROM (in-system programmable via JTAG) —
Process Technology 0.30 µm CMOS EEPROM CMOS EEPROM
Temperature na Operasyon 0C to +70C (commercial) [DATA_NEEDED: operating temperature grade]
Packhaging 208-pin RQFP (Plastic Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
Uri ng Pagpapasok Surface Mount Surface Mount
Lead-Free [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] —
Tindminan RoHS [DATA_NEEDED: not stated in retrieved distributor listings] [DATA_NEEDED: RoHS status]
Programmability JTAG (IEEE 1149.1) in-system programming In-system via IEEE 1149.1 JTAG
Device — EPM9560
Macro Cells — 560
User I/O Pins — 153
Pin-to-Pin Delay (tPD1) — 10 ns
I/O Bank Voltage (VCCIO) — 5.0 V

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