EPM9560RC208-12 vs EPM9560RC208-13 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-12 sa pamamagitan ng Altera at EPM9560RC208-13 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-12 | EPM9560RC208-13 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | EEPROM-based CPLD | — |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | — |
| Usable Gates | 12000 | 12,000 |
| User I/O Lines | 153 | — |
| Propagation Delay (tPD) | 12 ns | 13 ns |
| Maksimum na Taktiko ng Oras | 125 MHz | 125 MHz |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Packhaging | 208-pin RQFP (S-PQFP-G208) | 208-pin RQFP (Power Quad Flat Pack) |
| Terminal Pitch | 0.50 mm | — |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Logic Array Blocks | 20 | — |
| Speed Grade | -12 (12 ns) | -13 (13 ns pin-to-pin) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 EPLD |
| Logic Array Blocks (LABs) | — | 20 |
| User I/O Pins | — | 208 |
| Package Code | — | RC208 |
| Volte ng Pagbibigay | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Hanay ng Temperature na Operasyon | — | 0C to +70C (commercial) |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |