EPM9560RC208-12 vs EPM9560RC208-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-12 sa pamamagitan ng Altera at EPM9560RC208-14 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-12 | EPM9560RC208-14 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | — |
| Usable Gates | 12000 | 12,000 |
| User I/O Lines | 153 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maksimum na Taktiko ng Oras | 125 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Packhaging | 208-pin RQFP (S-PQFP-G208) | 208-pin RQFP (PQFP) |
| Terminal Pitch | 0.50 mm | — |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Logic Array Blocks | 20 | — |
| Speed Grade | -12 (12 ns) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy part) |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 149 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay | — | 14 ns |
| Volte ng Pagbibigay | — | 5 V |
| I/O Voltage Support | — | 3.3 V / 5 V |
| Program Memory Type | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (JTAG, IEEE 1149.1) |
| Process Technology | — | 0.35 µm CMOS EEPROM |