EPM9560RC208-12 vs EPM9560RC208-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-12 sa pamamagitan ng Altera at EPM9560RC208-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera
EPM9560RC208-3 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM9560RC208-12 | EPM9560RC208-3 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | — |
| Usable Gates | 12000 | 12,000 |
| User I/O Lines | 153 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maksimum na Taktiko ng Oras | 125 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Packhaging | 208-pin RQFP (S-PQFP-G208) | 208-pin RQFP (Power Quad Flat Pack) |
| Terminal Pitch | 0.50 mm | — |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: industrial / commercial range] |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| Logic Array Blocks | 20 | — |
| Speed Grade | -12 (12 ns) | -3 |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED] |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum Operating Frequency | — | [DATA_NEEDED: f_MAX] |
| Pin-to-Pin Delay (speed grade -3) | — | approximately 3 ns (slowest grade) |
| I/O Voltage Tolerance | — | 5V |
| Process Technology | — | 0.5 µm CMOS EPROM |
| Programming Interface | — | ByteBlaster / BitBlaster (JTAG-compatible) |
| Lifecycle | — | Mature / Last-time-buy (per Altera PDN for selected MAX 9000 ordering codes) |