EPM9560RC208-14 vs EPM9560ARC208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-14 sa pamamagitan ng Altera at EPM9560ARC208-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-14 | EPM9560ARC208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | 20 |
| User I/O Pins | 149 | 153 |
| Maximum Operating Frequency | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 14 ns | — |
| Volte ng Pagbibigay | 5 V | 5 V |
| I/O Voltage Support | 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG, IEEE 1149.1) | Yes (JTAG ISP) |
| Packhaging | 208-pin RQFP (PQFP) | 208-pin RQFP (PowerQuad II) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Tindminan RoHS | Non-compliant (legacy part) | Compliant (N suffix) |
| Pin-to-Pin Delay | — | 10 ns |
| Internal Counter Frequency | — | 144.9 MHz |
| Technology | — | CMOS EEPROM |
| Temperature na Operasyon | — | 0 C to +70 C (commercial) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Speed Grade | — | -10 |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |