EPM9560RC208-14 vs EPM9560RC208-18 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-14 sa pamamagitan ng Altera at EPM9560RC208-18 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-14 | EPM9560RC208-18 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Tapus ng Buhay |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 gates |
| Macrocells | 560 | 560 macrocells |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 149 | — |
| Maximum Operating Frequency | 117.6 MHz | 117.6 MHz (family -15 grade reference) |
| Pin-to-Pin Propagation Delay | 14 ns | — |
| Volte ng Pagbibigay | 5 V | 5 V |
| I/O Voltage Support | 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG, IEEE 1149.1) | — |
| Packhaging | 208-pin RQFP (PQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Tindminan RoHS | Non-compliant (legacy part) | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 (EPM9560) |
| Logic Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Propagation Delay (tPD) | — | 18 ns (speed grade -18) |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| User I/O Lines | — | 149 I/O lines |
| Flip-Flops | — | 772 flip-flops |
| Package JESD-30 Code | — | S-PQFP-G208 |
| Configuration Memory | — | EEPROM (non-volatile, no external config PROM) |
| Technology | — | CMOS |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Katayuan ng Lifecycle | — | EOL / mature (per Altera product discontinuance notice) |