EPM9560RC208-4C vs EPM9560RC208-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-4C sa pamamagitan ng Altera at EPM9560RC208-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-4C | EPM9560RC208-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 9000 (EPM9560) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 12 | — |
| Maximum User I/O Pins | 164 | — |
| Packhaging | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Speed Grade | -4 (12 ns pin-to-pin) | -15 (15 ns pin-to-pin) |
| Volte ng Pagbibigay | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes (JTAG ISP) | Yes, via IEEE Std. 1149.1 JTAG |
| Hanay ng Temperature na Operasyon | 0C to +70C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Pin-to-Pin Delay | 12 ns | 15 ns |
| Maximum System Frequency | 125 MHz | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Manufacturer | Altera Corporation | — |
| Family | — | MAX 9000 |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 macro cells |
| Counter Speed | — | 117.6 MHz |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |