EPM9560RC208-5 vs EPM9560RC208-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-5 sa pamamagitan ng Altera at EPM9560RC208-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-5 | EPM9560RC208-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD / CPLD |
| Macro Cells | 560 | — |
| Usable Gates | 12,000 | 560 |
| Logic Array Blocks (LABs) | 16 | 4 |
| Maximum User I/O | 149 | — |
| Dedicated Inputs | 16 | — |
| Flip-Flops | 772 | — |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Counter Frequency (fCNT) | 117.6 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Packhaging | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin Power Quad Flat Pack (RQFP-208) |
| Process Technology | CMOS EEPROM | 0.65 um CMOS EEPROM |
| Programming Interface | JTAG (IEEE Std 1149.1) + 5V ISP | JTAG (IEEE 1149.1) + Altera ISP |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) / -40C to +85C (industrial) |
| Tindminan RoHS | Non-compliant (5V process, legacy RQFP) | Compliant (ROHS3 per distributor listing) |
| Macrocells | — | 16 |
| User I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 7 ns (speed grade -7) |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX value] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Supply Voltage (VCCIO) | — | 5.0 V (TTL) or 3.3 V (LVCMOS with level translator) |
| Configuration Memory | — | Non-volatile on-chip EEPROM (no boot PROM required) |
| Output Drive Current | — | 160 mA DC sink per pin |