EPM9560RC240-12 vs EPM9560RC240-15W Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC240-12 sa pamamagitan ng Altera at EPM9560RC240-15W sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC240-12 | EPM9560RC240-15W |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 (EPM9560) | MAX 9000 |
| Device Type | EE PLD / CPLD | Complex Programmable Logic Device (CPLD) |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | — |
| User I/O Pins | 191 | 191 |
| Logic Array Blocks (LABs) | 20 | — |
| Maximum Propagation Delay (tPD) | 13.4 ns | — |
| Speed Grade | -12 (13.4 ns tPD) | — |
| Maximum Operating Frequency (estimated) | ~76 MHz registered | — |
| Core Supply Voltage (VCCINT) | 5 V | — |
| I/O Logic Levels | 3.3 V or 5 V (configurable) | — |
| Packhaging | PQFP-240 (RC240) 0.500 mm pitch, gull-wing | 240-pin RQFP (PowerQuad) with exposed pad |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Process Technology | CMOS | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Usable Gates | — | 12,000 |
| Pin-to-Pin Delay | — | 15 ns |
| Internal Frequency | — | 117.6 MHz |
| Volte ng Pagbibigay | — | 4.75 V to 5.25 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Logic Family | — | CMOS |
| Bilang ng Pins | — | 240 |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |