EPM9560RC240-15C vs EPM9560ARC240-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC240-15C sa pamamagitan ng Intel at EPM9560ARC240-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC240-15C | EPM9560ARC240-10 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks | 20 | — |
| User I/O Pins | 187 | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Propagation Delay (tPD) | 15 ns | — |
| Volte ng Pagbibigay | 5.0 V | — |
| Operating Voltage Range | 3.3 V or 5 V | — |
| Packhaging | 240-pin RQFP (PowerQuad II) | 240-pin PowerQuad QFP (RQFP / EAR240) |
| Terminal Pitch | 0.5 mm | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| Process Technology | CMOS | CMOS EEPROM |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| User I/Os (this package) | — | 191 (per Mouser listing) |
| Internal Frequency | — | 144.9 MHz |
| Propagation Delay (tpd) | — | 11.4 ns |
| Supply Voltage - Internal (VCCINT) | — | 5.0 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (selectable) |
| Configuration Memory | — | EEPROM (non-volatile, in-system programmable) |
| Logic Family | — | CMOS |