EPM9560RC304-15N vs EPM9560RC304-20C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-15N sa pamamagitan ng Altera at EPM9560RC304-20C sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560RC304-20C - MAX 9000 CPLD, 560 Macrocells, 5V | Intel / Altera
EPM9560RC304-20C ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-15N | EPM9560RC304-20C |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 (estimated from 560 macrocells) | 16 |
| Maximum Operating Frequency (fMAX) | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 15 ns (-15 speed grade) | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Packhaging | RQFP-304 | 304-pin RQFP |
| User I/O Count | 304 (package-level) | — |
| Process Technology | High-performance CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Operating Temperature Grade | Commercial (suffix N) | — |
| Tindminan RoHS | Compliant (lead-free per suffix N marking) | [DATA_NEEDED: rohs status] |
| Device Series | — | EPM9560 |
| Maximum User I/O Pins | — | 212 |
| fMAX (Internal) | — | 100 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns (speed grade -20) |
| Core Supply Voltage | — | 5.0 V |
| I/O Logic Level | — | 3.3 V or 5 V (configurable) |
| Programming Technology | — | EEPROM (in-system programmable) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Temperature na Operasyon | — | 0 C to +70 C (commercial) |
| Uri ng Pagpapasok | — | Surface Mount |