EPM9560RI208-10N vs EPM9560RI208-20N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-10N sa pamamagitan ng Altera at EPM9560RI208-20N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI208-10N | EPM9560RI208-20N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Register Bits | 12,160 | — |
| User I/Os | 212 | — |
| Pin-to-Pin Delay | 10 ns (speed grade -10) | 20 ns (-20 speed grade) |
| Maximum Frequency | 100 MHz to 125 MHz | — |
| Volte ng Pagbibigay | 5 V | 5.0 V |
| Packhaging | 208-pin RQFP (PQFP) | 208-pin RQFP |
| Temperature na Operasyon | -40C to +85C (Industrial grade, "RI" suffix) | Industrial (-40C to +85C) |
| Programming Method | In-system via IEEE 1149.1 (JTAG) | — |
| Level ng MSL | 3 (168 Hours) | — |
| Tindminan RoHS | ROHS3 Compliant (per fpgalink) | [DATA_NEEDED: RoHS status] |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Device Family | — | MAX 9000 |
| Macrocells | — | 560 |
| Counter Speed | — | 100 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Uri ng Pagpapasok | — | Surface Mount |
| Development Tool | — | MAX+PLUS II |
| Design Entry | — | Schematic, VHDL, Verilog HDL, AHDL |
| Packaging | — | Tray |
| Logic Architecture | — | Third-generation MAX (Multiple Array MatriX) |
| Fabrication Process | — | Advanced CMOS |