EPM9560RI208-20 vs EPM9560RI208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-20 sa pamamagitan ng Intel at EPM9560RI208-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI208-20 | EPM9560RI208-10N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - third generation | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| Packhaging | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm | 208-pin RQFP (PQFP) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range grade] | -40C to +85C (Industrial grade, "RI" suffix) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | ROHS3 Compliant (per fpgalink) |
| Uri ng Pagpapasok | Surface Mount | — |
| Register Bits | — | 12,160 |
| User I/Os | — | 212 |
| Pin-to-Pin Delay | — | 10 ns (speed grade -10) |
| Maximum Frequency | — | 100 MHz to 125 MHz |
| Volte ng Pagbibigay | — | 5 V |
| Programming Method | — | In-system via IEEE 1149.1 (JTAG) |
| Level ng MSL | — | 3 (168 Hours) |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |