EPM9560RI208-20 vs EPM9560RZ208-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-20 sa pamamagitan ng Intel at EPM9560RZ208-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI208-20 | EPM9560RZ208-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Process Technology | CMOS EEPROM | 0.35 µm CMOS EEPROM |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| Packhaging | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm | RQFP-208 (PowerQuad QFP) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range grade] | [DATA_NEEDED: temperature range] |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Macrocells | — | 560 |
| User I/O Pins (max) | — | 212 |
| Speed Grade | — | -15 (15 ns pin-to-pin delay) |
| Operating Voltage (Core) | — | 5.0 V |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fmax] |
| Pin-to-Pin Delay (tPD) | — | 15 ns |