EPM9560RI210-15 vs EPM9560RC304-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI210-15 sa pamamagitan ng Altera at EPM9560RC304-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560RI210-15 EPM9560RC304-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family MAX 9000 (EPM9560) —
Device Type Complex Programmable Logic Device (CPLD) —
Macrocells 560 560
Usable Gates 12,000 —
Logic Array Blocks (LABs) 20 16
User I/O Pins 164 212 (maximum)
Pin-to-Pin Delay (tPD) 15 ns (-15 speed grade) —
Supply Voltage (VCCINT) 5.0 V 5.0 V
I/O Voltage (MultiVolt) 3.3 V / 5.0 V compatible —
Configuration Memory EEPROM (non-volatile) On-chip EEPROM (non-volatile)
In-System Programmability Yes (JTAG ISP) Yes, via IEEE Std. 1149.1 JTAG
JTAG Boundary Scan IEEE 1149.1 compliant —
Packhaging 210-pin RQFP (PowerQuad) 304-pin RQFP (Plastic Quad Flat Pack)
Temperature na Operasyon Industrial (-40C to +85C) [DATA_NEEDED: industrial/commercial temperature grade]
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS ROHS3 Compliant [DATA_NEEDED: lead-free / RoHS compliance status]
Level ng Sensitivity sa Asid ng Moisture (MSL) 3 (168 Hours) —
Manufacturer Standard Lead Time 1-7 Days (distributor stock) —
Device Family — MAX 9000
Architecture — Multiple Array MatriX (MAX), EEPROM-based
Propagation Delay (tPD) — 15 ns (combinatorial, pin-to-pin)
Bilang ng Pin — 304
I/O Standard — 5.0 V TTL / PCI-compliant
Technology Node — High-performance CMOS, EEPROM process

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