EPM9560RI304-15 vs EPM9560RI304-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI304-15 sa pamamagitan ng Intel at EPM9560RI304-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RI304-20 - 560 Macrocell MAX 9000 CPLD, 20ns, RQFP-304 | Intel
EPM9560RI304-20 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RI304-15 | EPM9560RI304-20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Device Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - EEPROM-based CPLD | Multiple Array MatriX (MAX) - 3rd generation |
| Macrocells | 560 | — |
| Flip-Flops | 772 | — |
| User I/Os | 212 (216 per some datasheets) | — |
| Dedicated Inputs | 4 | — |
| Total Terminals | 304 | — |
| Package Code | HFQFP / S-PQFP-G304 | — |
| Package Type | 304-pin RQFP (Quad Flat Pack, gull-wing) | — |
| Propagation Delay (tpd) | 11.4 ns (per digchip datasheet); 16.6 ns reported by MicrochipUSA | — |
| Maximum Internal Frequency | 145 MHz | — |
| Speed Grade | -15 | — |
| Supply Voltage (VCCINT/VCCIO) | 4.5 V to 5.5 V (5 V typical) | — |
| I/O Logic Levels | 3.3 V or 5 V configurable | — |
| Temperature na Operasyon | 0 C to 70 C (commercial) | [DATA_NEEDED: industrial/commercial range] |
| Temperature Grade | Industrial (per Partstack listings) | — |
| Logic Family | CMOS | — |
| Programming | 5.0-V in-system programmable via JTAG (IEEE 1149.1) | — |
| Process Technology | 0.5 µm CMOS EEPROM | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: lead-free / RoHS variant] |
| Macrocell Count | — | 560 |
| Logic Array Blocks (LABs) | — | 16 (max) |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum User I/O Pins | — | 212 |
| Supply Voltage (VCC) | — | 5.0 V |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes, via JTAG (IEEE 1149.1) |
| Boundary Scan | — | IEEE Std. 1149.1 JTAG |
| Packhaging | — | 304-pin RQFP (Plastic Quad Flat Pack) |
| Reprogram Cycles | — | 100+ (EEPROM) |