EPM9560TC208-20 vs EPM9560RC208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560TC208-20 sa pamamagitan ng Altera at EPM9560RC208-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560TC208-20 | EPM9560RC208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 9000 | MAX 9000 (EPM9560) |
| Macrocells | 560 | 560 |
| Usable Gates | 12000 | 12,000 |
| User I/O | 149 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| Packhaging | TQFP-208 (TC208) | 208-pin RQFP (28x28 mm) |
| Pin/Package Code | TC208 (JEDEC S-PQFP-G208) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Technology | CMOS EEPROM | — |
| Core Supply Voltage | 5 V | — |
| I/O Supply Voltage (MultiVolt) | 3.3 V or 5 V | — |
| In-System Programming | Yes (IEEE Std 1149.1 JTAG) | — |
| Flip-Flops | 772 | 772 |
| Temperature na Operasyon | [DATA_NEEDED: commercial/industrial temperature grade] | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks | — | 35 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maksimum na Taktiko ng Oras | — | 100 MHz |
| Volte ng Pagbibigay | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |