EPM9560WI208-20 vs EPM9560WC208 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560WI208-20 sa pamamagitan ng Intel at EPM9560WC208 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560WI208-20 | EPM9560WC208 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Device Family | MAX 9000 | — |
| Device Type | EE PLD / Complex Programmable Logic Device (CPLD) | EE Programmable Logic Device (CPLD) |
| Macrocells / Logic Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | 35 |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 23.6 ns | — |
| Speed Grade | -20 | — |
| Process Technology | 0.35 micron CMOS EEPROM | CMOS, electrically erasable |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Package Type | CQFP-208 (Ceramic Quad Flat Pack) | — |
| Terminal Form | Gull Wing | — |
| Number of Terminals | 208 | — |
| Package Code | QFP | — |
| Package Shape | Square | — |
| Operating Temperature Grade | Industrial | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Design Tools | MAX+PLUS II, Quartus | — |
| Compliance | [DATA_NEEDED: RoHS status] | — |
| Family | — | MAX 9000 |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| Maximum User I/O | — | 149 |
| Maksimum na Taktiko ng Oras | — | 117.6 MHz |
| Propagation Delay (tpd, -15 grade) | — | 16.6 ns |
| Volte ng Pagbibigay | — | 3.3 V or 5 V |
| Packhaging | — | 208-pin CQFP (Ceramic Quad Flat Pack) |
| Terminal Pitch | — | 0.50 mm |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Configuration Memory | — | Non-volatile EE (instant-on) |
| Hot Socketing Support | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS compliance] |