IDTADC1212D080HN-C1 vs ADC1212D125HN-C1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng IDTADC1212D080HN-C1 sa pamamagitan ng Renesas Electronics at ADC1212D125HN-C1 sa pamamagitan ng Renesas Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Renesas Electronics
IDTADC1212D080HN-C1 - Dual 12-bit 80MSPS ADC, 64-VFQFPN | Renesas
IDTADC1212D080HN-C1 ObsoleteRenesas Electronics
ADC1212D125HN-C1 - Dual 12-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1212D125HN-C1 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | IDTADC1212D080HN-C1 | ADC1212D125HN-C1 |
|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Pangangasiwaan | 12 bit | 12 bit |
| Number of Channels | 2 (dual) | 2 (dual) |
| Sampling Rate (Max) | 80 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Single-ended (differential capable) | Differential analog |
| Data Interface | CMOS (DDR/SDR selectable) | — |
| Packhaging | 64-VFQFPN (9x9 mm) with exposed pad | 64-pin HVQFN (9 x 9 mm, SOT804-3) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Analog Supply Voltage | 1.8 V (typical) [DATA_NEEDED: exact range] | 1.8 V |
| Digital Supply Voltage | 1.8 V / 3.3 V [DATA_NEEDED: exact range] | 3.3 V |
| Power Dissipation (typical) | [DATA_NEEDED: mW at 80 MSPS] | — |
| Hanay ng Temperature na Operasyon | -40 C to +85 C [DATA_NEEDED: exact grade] | [DATA_NEEDED: operating temperature range] |
| Input Bandwidth | [DATA_NEEDED: MHz] | — |
| SNR (typical) | [DATA_NEEDED: dBFS] | — |
| SFDR | [DATA_NEEDED: dBc] | — |
| INL/DNL | [DATA_NEEDED: LSB] | — |
| Level ng MSL | 3 [DATA_NEEDED] | — |
| Tindminan RoHS | [DATA_NEEDED] | Compliant |
| Maximum Sample Rate | — | 125 Msps |
| Available Speed Grades | — | 65 / 80 / 105 / 125 Msps |
| Digital Output Interface | — | CMOS or LVDS DDR |
| Package Height | — | 0.85 mm |
| Conversion Topology | — | Pipelined with proprietary error correction |