LP5900TLX-1.8 vs MIC5318-1.8YMT Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LP5900TLX-1.8 sa pamamagitan ng Texas Instruments at MIC5318-1.8YMT sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Texas Instruments
LP5900TLX-1.8 - 150mA 1.8V LDO Regulator, 4-DSBGA | Texas Instruments
LP5900TLX-1.8 ✓ NakahandaMicrochip Technology
MIC5318-1.8YMT - 300mA 1.8V ULDO Regulator | Microchip | 6-TMLF
MIC5318-1.8YMT ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LP5900TLX-1.8 | MIC5318-1.8YMT |
|---|---|---|
| Brand | Texas Instruments | Microchip Technology |
| Kategorya | Voltage Regulators | Voltage Regulators |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Type ng Output | Fixed | Fixed |
| Fixed Output Voltage | 1.8 V | — |
| Maksimum na Current ng Output | 150 mA | 300 mA |
| Hanay ng Voltage ng Input | 2.5 V to 5.5 V | 2.5 V to 6 V |
| Voltage ng Dropout | 90 mV typical at 150 mA | 90 mV typical at 300 mA |
| Output Ng Gulo | 6.5 uVrms (10 Hz to 100 kHz) | 30 uVrms (10 Hz to 100 kHz) |
| PSRR | 85 dB at 1 kHz | 60 dB at 1 kHz |
| Quiescent Current (enabled) | 25 uA typical | — |
| Quiescent Current (shutdown) | 1.1 uA typical | — |
| Output Voltage Tolerance | ±2 % | — |
| Pin na Pinapayagan | Yes (active-high) | Yes (active-low) |
| Temperature na Operasyon | -40 C to +125 C | -40C to +125C |
| Packhaging | 4-DSBGA (YZR) 1 mm x 1 mm | 6-TMLF (1.6 mm x 1.6 mm) with exposed pad |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Bypass Capacitor Required | No | — |
| Tindminan RoHS | Compliant | Compliant |
| Input Capacitor | 0.1 uF ceramic minimum | — |
| Output Capacitor | 1 uF ceramic low-ESR | — |
| Output Volte | — | 1.8 V |
| Output Voltage Accuracy | — | +/-2% (initial) |
| Kuru-kuryente ng Kapayapaan | — | 90 uA typical |
| Kuru-kuryente ng Pagbubuwag | — | [DATA_NEEDED: EN logic-low IQ] |
| Thermal Resistance (theta_JA) | — | 78 C/W (typical, 4-layer JEDEC board) |
| Level ng MSL | — | 1 |