LTC2150CUJ-14 vs LTC2152IUJ-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2150CUJ-14 sa pamamagitan ng Analog Devices at LTC2152IUJ-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ NakahandaAnalog Devices
LTC2152IUJ-14 - 14-Bit 250Msps ADC, 40-QFN | Analog Devices
LTC2152IUJ-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2150CUJ-14 | LTC2152IUJ-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 14 bit | 14 bits |
| Number of Channels | 1 | — |
| Sample Rate | 170 Msps | 250 Msps |
| Architecture | Pipelined | Pipelined |
| Analog Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | — |
| Digital Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | — |
| INL (typical) | ±0.85 LSB | — |
| DNL (typical) | ±0.25 LSB | — |
| Transition Noise | 1.82 LSBRMS | 1.82 LSBRMS |
| Missing Codes | None over temperature | None over temperature |
| Full-Power Sample/Hold Bandwidth | 1.25 GHz | — |
| Digital Output Interface | DDR LVDS | DDR LVDS |
| Encode Clock Inputs | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) | — |
| Clock Duty-Cycle Stabilizer | Optional (selectable) | — |
| Configuration Interface | Serial SPI port | — |
| Latency | 5 clock cycles | — |
| Power-Saving Modes | Sleep and Nap modes | — |
| Packhaging | 40-QFN (6 mm × 6 mm) with exposed pad | 40-QFN (6 mm x 6 mm) with exposed pad |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Compliant (Pb-free #PBF suffix) | — |
| Number of Input Channels | — | 1 |
| INL (Typical) | — | ±0.85 LSB |
| DNL (Typical) | — | ±0.25 LSB |
| Conversion Latency | — | 6 clock cycles |
| Clock Input | — | Differential ENC+/ENC-, sine/PECL/LVDS/TTL/CMOS compatible |
| Clock Duty Cycle Stabilizer | — | Optional (selectable) |
| Hanay ng Temperature na Operasyon | — | -40 C to +85 C (Industrial) |
| Lead Finish | — | Lead-free (PBF) |
| Temperature Grade | — | Industrial |