LTC2150CUJ-14 vs LTC2257CUJ-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2150CUJ-14 sa pamamagitan ng Analog Devices at LTC2257CUJ-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ NakahandaAnalog Devices
LTC2257CUJ-14 - 14-Bit 40Msps Ultralow Power ADC | Analog Devices
LTC2257CUJ-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2150CUJ-14 | LTC2257CUJ-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 14 bit | 14 bit |
| Number of Channels | 1 | — |
| Sample Rate | 170 Msps | 40 Msps |
| Architecture | Pipelined | Pipelined |
| Analog Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | — |
| Digital Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | — |
| INL (typical) | ±0.85 LSB | ±1 LSB |
| DNL (typical) | ±0.25 LSB | ±0.3 LSB |
| Transition Noise | 1.82 LSBRMS | 1.13 LSB RMS |
| Missing Codes | None over temperature | — |
| Full-Power Sample/Hold Bandwidth | 1.25 GHz | — |
| Digital Output Interface | DDR LVDS | — |
| Encode Clock Inputs | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) | — |
| Clock Duty-Cycle Stabilizer | Optional (selectable) | — |
| Configuration Interface | Serial SPI port | Serial SPI port |
| Latency | 5 clock cycles | — |
| Power-Saving Modes | Sleep and Nap modes | Shutdown and Nap |
| Packhaging | 40-QFN (6 mm × 6 mm) with exposed pad | 40-pin QFN (6 mm × 6 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant (Pb-free #PBF suffix) | — |
| Number of Inputs | — | 1 |
| Supply Voltage (Analog) | — | 1.8 V (typ) |
| Power Dissipation | — | 49 mW at 40 Msps |
| Input Range (selectable) | — | 1 Vp-p to 2 Vp-p |
| Full-Power Input Bandwidth | — | 800 MHz |
| Missing Codes Over Temperature | — | None |
| Digital Outputs | — | Full-rate CMOS / DDR CMOS / DDR LVDS (selectable) |
| Output Supply Range (OVDD) | — | 1.2 V to 1.8 V |
| Optional Features | — | Data output randomizer, clock duty cycle stabilizer |
| Compliance | — | RoHS compliant (Pb-free #PBF suffix) |