LTC2171CUKG-14 vs LTC2257CUJ-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2171CUKG-14 sa pamamagitan ng Analog Devices at LTC2257CUJ-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2257CUJ-14 - 14-Bit 40Msps Ultralow Power ADC | Analog Devices
LTC2257CUJ-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2171CUKG-14 | LTC2257CUJ-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 14 bits | 14 bit |
| Number of Channels | 4 (simultaneous sampling) | — |
| Rate ng Pagkupita | 40 Msps per channel | — |
| Architecture | Pipelined | Pipelined |
| Volte ng Pagbibigay | 1.8 V (single supply) | — |
| Total Power Dissipation | 311 mW (typ) | — |
| Power per Channel | 78 mW (typ) | — |
| INL (Integral Non-Linearity) | ±1 LSB (typ) | — |
| DNL (Differential Non-Linearity) | ±0.3 LSB (typ) | — |
| Transition Noise | 1.2 LSB RMS | 1.13 LSB RMS |
| SFDR (Spurious-Free Dynamic Range) | 90 dB | — |
| Analog Input Bandwidth | 800 MHz full power | — |
| Hanay ng Voltage ng Input | 1 Vp-p to 2 Vp-p (selectable) | — |
| Digital Output Interface | Serial LVDS (1-lane or 2-lane) | — |
| Configuration Interface | Serial SPI | Serial SPI port |
| Power-Saving Modes | Shutdown and Nap | Shutdown and Nap |
| Missing Codes | No missing codes over temperature | — |
| Packhaging | 52-pin QFN (7 mm × 8 mm) with EP | 40-pin QFN (6 mm × 6 mm) |
| Hanay ng Temperature na Operasyon | 0 °C to +70 °C (C-suffix) | — |
| Pin-Compatible Family | 12-bit and 14-bit versions (LTC2170, LTC2151, LTC2150) | — |
| Sample Rate | — | 40 Msps |
| Number of Inputs | — | 1 |
| Supply Voltage (Analog) | — | 1.8 V (typ) |
| Power Dissipation | — | 49 mW at 40 Msps |
| Input Range (selectable) | — | 1 Vp-p to 2 Vp-p |
| Full-Power Input Bandwidth | — | 800 MHz |
| INL (typical) | — | ±1 LSB |
| DNL (typical) | — | ±0.3 LSB |
| Missing Codes Over Temperature | — | None |
| Digital Outputs | — | Full-rate CMOS / DDR CMOS / DDR LVDS (selectable) |
| Output Supply Range (OVDD) | — | 1.2 V to 1.8 V |
| Optional Features | — | Data output randomizer, clock duty cycle stabilizer |
| Uri ng Pagpapasok | — | Surface Mount |
| Compliance | — | RoHS compliant (Pb-free #PBF suffix) |