LTC2256CUJ-14 vs LTC2257CUJ-12 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2256CUJ-14 sa pamamagitan ng Analog Devices at LTC2257CUJ-12 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI
LTC2256CUJ-14 ✓ NakahandaAnalog Devices
LTC2257CUJ-12 - 12-Bit 40Msps Ultralow Power 1.8V ADC | Analog Devices
LTC2257CUJ-12 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2256CUJ-14 | LTC2257CUJ-12 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 14 bit | 12 bits |
| Sample Rate | 25 Msps | 40 Msps |
| Number of Inputs | 1 | — |
| Architecture | Pipelined | Pipelined, 1 channel |
| Volte ng Pagbibigay | 1.8 V (single) | — |
| Power Dissipation | 35 mW at 25 Msps | 79 mW at 40 Msps |
| INL | ±1 LSB (typical) | — |
| DNL | ±0.3 LSB (typical) | — |
| Transition Noise | 1.13 LSB RMS | 0.3 LSB RMS |
| SNR | 73 dB | — |
| Input Bandwidth (Full Power) | 800 MHz | — |
| Input Range | 1 Vp-p to 2 Vp-p (selectable, differential) | 1 V P-P to 2 V P-P (selectable) |
| Digital Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) | — |
| Output Supply Range (CMOS) | 1.2 V to 1.8 V | — |
| Packhaging | 40-QFN (6 mm x 6 mm) | 40-QFN (6 mm x 6 mm) |
| Pin/Package Code | UJ (QFN-40, 6x6 mm) | — |
| Configuration Interface | Serial SPI port | SPI serial port |
| Power-Saving Modes | Nap mode, full shutdown | — |
| Optional Features | Clock duty-cycle stabilizer, data output randomizer | — |
| Temperature na Operasyon | 0C to +70C (commercial C-grade) | -40C to +85C |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Compliant (PBF suffix) | — |
| Supply Voltage (Analog) | — | 1.8 V (single) |
| Supply Voltage (Digital Output) | — | 1.2 V to 1.8 V (separate rail) |
| Input Bandwidth | — | 800 MHz full-power |
| INL (Typical) | — | +/-0.3 LSB |
| DNL (Typical) | — | +/-0.1 LSB |
| Missing Codes | — | None over temperature |
| Output Formats | — | CMOS, DDR CMOS, DDR LVDS (selectable) |
| Special Features | — | Clock duty-cycle stabilizer, output randomizer, shutdown and nap modes |