LTC2341HUH-16 vs LTC2249IUH Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2341HUH-16 sa pamamagitan ng Analog Devices at LTC2249IUH sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2341HUH-16 - Dual 16-Bit 666ksps SAR ADC | Analog Devices
LTC2341HUH-16 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2341HUH-16 | LTC2249IUH |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 16 bit | 14 bits |
| Number of Channels | 2 (simultaneous sampling) | — |
| Architecture | SAR (Successive Approximation Register) | Pipelined |
| Sample Rate | 666 ksps per channel | 80 Msps |
| Input Type | Differential, wide common-mode range | — |
| Input Ranges (SoftSpan) | ±4.096 V, 0 to 4.096 V, ±2.048 V, 0 to 4.096 V | — |
| Volte ng Pagbibigay | 5 V | — |
| Reference | Internal 4.096 V with buffer (external reference option) | — |
| Digital Interface | Pin-selectable SPI CMOS (1.8 V to 5 V) or LVDS | — |
| CMOS Output Lanes | 1 or 2 lanes (selectable) | — |
| Packhaging | 32-QFN (5x5 mm), UH suffix | 32-Pin QFN (5x5) with Exposed Pad (UH) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40 °C to +85 °C (industrial) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant | Compliant (Pb-free PBF suffix) |
| Lead Free | Yes (PBF suffix) | — |
| Number of Input Channels | — | 1 |
| Supply Voltage (VDD) | — | 2.85 V to 3.4 V (3 V typical) |
| Power Dissipation | — | 222 mW at 80 Msps |
| SNR | — | 73 dB at 70 MHz input |
| SFDR | — | 90 dB at 70 MHz input |
| INL (typical) | — | ±1 LSB |
| DNL (typical) | — | ±0.5 LSB |
| Full-Power Analog Input Bandwidth | — | 575 MHz |
| Differential Input Range | — | 1 V to 2 V peak-to-peak |
| Data Interface | — | Parallel CMOS/TTL |
| Data Output Format | — | Offset Binary / Two's Complement (selectable) |