M7AFS600-FGG256 vs AFS600-FG256 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng M7AFS600-FGG256 sa pamamagitan ng Microchip Technology at AFS600-FG256 sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
M7AFS600-FGG256 - Fusion FPGA 600K Gates 256-BGA | Microchip
M7AFS600-FGG256 ✓ NakahandaMicrochip Technology
AFS600-FG256 - 600K Mixed-Signal Fusion FPGA | Microchip
AFS600-FG256 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | M7AFS600-FGG256 | AFS600-FG256 |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Fusion (M7AFS600) | — |
| System Gates | 600K | 600,000 gates |
| Flip-Flops | 110592 | — |
| User I/O | 119 | — |
| Embedded Processor | ARM CoreMP7 | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 130 nm flash-based | 130 nm |
| Maximum Frequency | 1098.9 MHz (distributor listing) | 1098.9 MHz |
| Packhaging | 256-LBGA / 256-FBGA | — |
| Ball Pitch | 1 mm | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Memory | Flash (single-chip, non-volatile) | Nonvolatile flash-based CMOS |
| Analog Features | Integrated configurable analog blocks, clock generation and management | — |
| Temperature na Operasyon | [DATA_NEEDED: Operating Temperature Range] | 0 C to 70 C |
| Packaging | Tray | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: Moisture Sensitivity Level] | — |
| Product Type | — | Fusion mixed-signal FPGA |
| User I/O Count | — | 119 I/Os |
| Embedded Memory | — | 110,592 bits |
| Volte ng Pagbibigay | — | 1.5 V |
| Logic Family | — | CMOS |
| Metal Layers | — | 7 layers |
| Power-Up Behavior | — | Live at Power-Up (LAPU) |
| Package Type | — | 256-pin low-profile BGA |
| Package Pitch | — | 1.0 mm |
| Bilang ng Pin | — | 256 pins |
| Device Type | — | FPGA |
| Analog Capability | — | Configurable analog blocks |
| Clock Capability | — | Integrated clock generation and management circuitry |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification status] |